Gentlemen,
There are a few more VSI-H issues that need to be aired and decided:

1. LVDS Receiver
Issue: Dick Ferris suggests that a receiver with no input should fail-safe to logic '1'.  Other suggest that the fail-safe state should simply be a stable '0' or '1', with no preference.
Discussion:  From what I can see, stability is more important that the actual state.
Recommendation: Receiver with no input should fail-safe to either a stable logic '0' or stable logic '1'.

2. TTL Monitor Ports
Issue: The 9Feb draft specified TTL monitor ports should be designed to drive into 50-ohm load.  Dick Ferris suggests that, if the ports are only for occassional scope monitoring, that a better way is to use a 50-ohm 'back termination' by placing a series 50-ohm resistor on the TTL driver.
Discussion:  Either was is OK with me.
Recommendation:  Let me know what is your preference.

3. Range of Delay Offset
Issue: What should be specified range of delay offset?
Discussion: If range is +/-0.5 of ROT1PPS period, then any arbitrary delay can be accomplished by combination of ROT clock and delay-offset setting.  Is +/-0.5 ROT1PPS the best, or perhaps 0-1 ROT1PPS so that the delay is always positive wrt ROT clock (which might make engineering simpler).
Recommendation:  Either OK with me.  Let me know your preference.


Please consider these issues as soon as possible and get back to me.  I have done quite a bit of work on VSI-H spec to update its organization and content.  As soon as we get these issues (and those of my e-mail of a couple days ago) settled, I will release the updated draft VSI-H spec.  I would much appreciate you prompt reply.

Regards, Alan